In a conventional boost converter, the voltage Vout at its output is generally significantly larger than the voltage Vin at its input. Pulse Width Modulation (PWM) is used to control a power switch of the converter to regulate the output voltage Vout. In steady state operation, the duty cycle D of the power switch is given by:
  D  =                    Vout        -        Vin            Vout        .  
As the input voltage Vin approaches the output voltage Vout, the duty cycle D decreases to zero. However, in practice, all physical converters have some finite minimum on-time. In voltage mode control, the minimum on-time can be made quite small, but in current mode control, the minimum on-time is generally significantly longer because it includes a blanking period and a delay period of the current sensing PWM comparator. Typically, in current mode control, the minimum on-time is at least 50 ns and is often 100 ns or more. Eventually, as Vin approaches Vout, the minimum on-time becomes too large to create the required duty cycle. At this point, the boost converter will begin bursting on and off to achieve the required small duty cycle on average by alternating periods with no switching and periods of near minimum duty cycle switching. However, since the input-output voltage difference is very small, the inductor discharges very little during the synchronous rectifier on-time. As a result, the inductor current builds up during each near minimum on-time pulse of the power switch, but discharges only slightly during the remainder of the period. Over the course of the several switching cycles in a burst, the inductor current builds up significantly, and then discharges to the output during the non-switching part of the burst. This leads to large inductor current excursions and substantial output voltage ripple.
FIGS. 1A-1D illustrate simulation of a conventional synchronous boost converter exhibiting this bursting behavior in low overhead operation. In this example, Vin=3.95V and Vout=4.00V. Other parameters of the converter are selected as follows: inductance of the inductor is equal to 4 μH, capacitance of the output capacitor is equal to 4.7 μF, switching frequency is 1 MHz, and the minimum on-time period is 90 ns. At the left edge of the plot, the output voltage Vout (FIG. 1A) begins above the 4.0V regulation voltage and gradually falls below the regulation voltage. At this point, the voltage Vcomp (FIG. 1C) at the output of the error amplifier ramps up sharply and the power switch begins turning on for short durations, near the minimum on-time of 90 ns, as illustrated by switch voltage Vsw in FIG. 1B. After several cycles, the inductor current IL (FIG. 1D) has built up substantially due to the very small slope of the inductor discharge (which is due to the fact that there is only a 50 mV voltage across the inductor during this portion of the switching period). Eventually, the increased inductor current drives the output voltage up and the error amplifier output decreases. Once the commanded on-time of the power switch falls below 90 ns (the minimum on-time), all switching stops and the inductor discharges its built-up current into the output causing the output voltage to substantially over-shoot the regulation voltage. This behavior generally leads to undesirably large output voltage ripple.
The point of onset of this behavior is dependent upon the power switch minimum on-time, the total series resistance of the inductor discharge path (inductor resistance and synchronous rectifier resistance), and the switching frequency. Higher series resistance will improve the situation by providing greater reverse voltage to reset the inductor current during the discharge phase. Higher switching frequencies increase the likelihood of this problem since the same minimum on-time translates into a larger duty cycle given the shorter switching period.
Currently, some of the synchronous boost DC/DC converters manufactured by Linear Technology Corporation, the assignee of the present application, eliminate this problem by completely disabling the synchronous rectifier when the overhead voltage (Vout−Vin) is less than some small threshold voltage (e.g. 200 mV). This threshold is chosen as the overhead voltage that still provides sufficient reset of the inductor current in the worst case. With the synchronous rectifier disabled, the reverse voltage across the inductor is increased substantially, resulting in sufficient inductor discharge during each cycle to eliminate the undesired bursting behavior. In addition, with the synchronous rectifier disabled, the effective output voltage is greater, thereby requiring the converter to run at a duty cycle that is greater then the minimum on-time. The disadvantage of this approach is that it results in a drastic drop in efficiency at the point where the synchronous rectifier is disabled.
It is noted that the bursting behavior described above resembles the pulse skipping behavior of DC/DC converters operating in a discontinuous conduction mode at a light load. However, in the case of converters operating in a discontinuous conduction mode, the minimum on-time is reached due to a light load rather then due to the input voltage being close to the output voltage. Also, in a discontinuous conduction operation, the pulse skipping behavior does not result in a significant output voltage ripple since the inductor is fully reset each switching period and the inductor current is not able to build up as it does in low overhead operation. Generally, pulse skipping due to deep discontinuous operation is not a significant performance problem, unlike the bursting in low overhead operation of boost converters.
Hence, it would be desirable to eliminate the low voltage overhead bursting behavior of boost converters and its associated current and voltage ripple while still maintaining high-efficiency operation.